appliancerepairfirst

Table 1.1 lists various PC repair tools and the importance of each.

By : Book-PC Repair and Maintenance: A Practical Guide

Most programs are organized into multiple blocks of instructions called subroutines
rather than a single large sequence of instructions. Subroutines are located apart
from the main program segment and are invoked by a subroutine call. This call is
a type of branch instruction that temporarily jumps the microprocessors PC to
the subroutine, allowing it to be executed. When the subroutine has competed,
control is returned to the program segment that called it via a return from
subroutine instruc- tion. Subroutines provide several bene?ts to a program,
including modularity and ease of reuse. A modular subroutine is one that can be
relocated in different parts of the same program while still performing the same
basic function. An example of a modular subroutine is one that sorts a list of
numbers in ascending order. This sorting subroutine can be called by multiple
sections of a program and will perform the same operation on multiple lists.
Reuse is related to modularity and takes the con- cept a step farther by
enabling the subroutine to be transplanted from one program to another with

-out modi?cation. This concept greatly speeds the software development process.

Almost all microprocessors provide inherent support for subroutines in their
architectures and in- struction sets. Recall that the program counter keeps track of
the next instruction to be executed and that branch instructions provide a mechanism
for loading a new value into the PC. Most branch in- structions simply cause a new
value to be loaded into the PC when their speci?c branch condition is satis?ed.
Some branch instructions, however, not only reload the PC but also instruct the
microprocessor to save the current value of the PC off to the side for later recall.
This stored PC value, or sub- routine return address, is what enables the subroutine
to eventually return control to the program that called it. Subroutine call instructions
are sometimes called branch-to-subroutine or jump-to-subroutine, and they
may be unconditional.

When a branch-to-subroutine is executed, the PC is saved into a data structure
called a stack. The stack is a region of data memory that is set aside by the
programmer speci?cally for the main pur- pose of storing the microprocessors
state information when it branches to a subroutine. Other uses for the stack will
be mentioned shortly. A stack is a last-in, ?rst-out memory structure. When
data is stored on the stack, it is pushed on. When data is removed from the stack,
it is popped off. Popping the stack recalls the most recently pushed data. The ?rst
datum to be pushed onto the stack will be the last to be popped. A stack pointer
(SP) holds a memory address that identi?es the top of the stack at any given time.
The SP decrements as entries are pushed on and increments at they are popped off,
thereby growing the stack downward in memory as data is pushed on as shown
in Fig. 3.5.

By pushing the PC onto the stack during a branch-to-subroutine, the microprocessor
now has a means to return to the calling routine at any time by restoring the PC to its
previous value by simply popping the stack. This operation is performed by a
return-from-subroutine instruction. Many mi- croprocessors push not only the PC
onto the stack when calling a subroutine, but the accumulator and ALU status ?ags
as well. While this increases the complexity of a subroutine call and return
somewhat, it is useful to preserve the state of the calling routine so that it may
resume control smoothly when the subroutine ends.

FIGURE 3.5 Generic stack operation.

The stack can store multiple entries, enabling multiple subroutines to be active at
the same time. If one subroutine calls another, the microprocessor must keep track
of both subroutines return ad- dresses in the order in which the subroutines have
been called. This subroutine nesting process of one calling another subroutine,
which calls another subroutine, naturally conforms to the last-in, ?rst-out
operation of a stack.

To implement a stack, a microprocessor contains a stack pointer register that is
loaded by the programmer to establish the initial starting point, or top, of the stack.
Figure 3.6 shows the hypothetical microprocessor in more complete form with
a stack pointer register.

Like the PC, the SP is a counter that is automatically modi?ed by certain
instructions. Not only do subroutine branch and return instructions use the stack,
there are also general-purpose push/pop in- structions provided to enable the
programmer to use the stack manually. The stack can make certain calculations
easier by pushing the partial results of individual calculations and then popping
them as they are combined into a ?nal result.

The programmer must carefully manage the location and size of the stack. A
microprocessor will freely execute subroutine call, subroutine return, push, and
pop instructions whenever they are en- countered in the software. If an empty
stack is popped, the microprocessor will oblige by reading back whatever data
value is present in memory at the time and then incrementing the SP. If a full
stack is pushed, the microprocessor will write the speci?ed data to the location
pointed to by the SP and then decrement it. Depending on the exact
circumstances, either of these operations can corrupt other parts of the program
or data that happens to be in the memory location that gets overwritten. It
is the programmers responsibility to leave enough free memory for the desired
stack depth and then to not nest too many subroutines simultaneously. The
programmer must also ensure that there is symmetry between push/pop and
subroutine call/return operations. Issuing a return-from-subroutine instruction
while already in the main program would lead to undesirable results when the
microprocessor fetches reloads the PC with an incorrect return address.

FIGURE 3.6 Microprocessor with stack pointer register.

By : E-book Complete_Digital_Design

The multitude of complex tasks performed by computers can be broken down
into sequences of simple operations that manipulate individual numbers and then
make decisions based on those calcula- tions. Certain types of basic
instructions are common across nearly every microprocessor in existence and
can be classi?ed as follows for purposes of discussion:

Arithmetic: add or subtract two values
Logical: Boolean (e.g., AND, OR, XOR, NOT, etc.) manipulation of one or
two values
Transfer: retrieve a value from memory or store a value to memory
Branch: jump ahead or back to a particular instruction if a speci?ed condition
is satis?ed

Arithmetic and logical instructions enable the microprocessor to modify and
manipulate speci?c pieces of data. Transfer instructions enable these data to be
saved for later use and recalled when necessary from memory. Branch operations
enable instructions to execute in different sequences, de- pending on the results
of arithmetic and logical operations. For example, a microprocessor can compare
two numbers and take one of two different actions if the numbers are equal or
unequal. Each unique instruction is represented as a binary value called an opcode.
A microprocessor fetches and executes opcodes one at a time from program
memory. Figure 3.4 shows a hypothetical microprocessor to serve as an example
for discussing how a microprocessor actually advances through and executes
the opcodes that form programs.

A microprocessor is a synchronous logic element that advances through opcodes
on each clock cycle. Some opcodes may be simple enough to execute in a single
clock cycle, and others may take multiple cycles to complete. Clock speed is often
used as an indicator of a microprocessors perfor- mance. It is a valid indicator
but certainly not the only one, because each microprocessor requires a different
number of cycles for each instruction, and each instruction represents a different
quantity of useful work.

FIGURE 3.4 Simple microprocessor.

When an opcode is fetched from memory, it must be brie?y examined to determine
what needs to be done, after which the appropriate actions are carried out.
This process is called instruction decod- ing. A central logic block coordinates
the operation of the entire microprocessor by fetching instructions from memory,
decoding them, and loading or storing any data as required. The accumulator is
a register that temporarily holds data while it is being processed. Execution of
an instruction to load the accumulator with a byte from memory would begin with
a fetch of the opcode that represents this action. The instruction decoder would
then recognize the opcode and initiate a memory read via the same microprocessor
bus that was used to fetch the opcode. When the data returns from memory,
it would be loaded into the accumulator. While there may be multiple distinct
logical steps in decod- ing an instruction, the steps may occur simultaneously or
sequentially, depending on the architecture of the microprocessor and its
decoding logic.

The accumulator is sized to hold the largest data value that the microprocessor
can handle in a single arithmetic or logical instruction. When engineers talk of an
8-bit or 32-bit microprocessor, they are usually referring to the internal data-path
width the size of the accumulator and the arith- metic logic unit (ALU). The ALU
is sometimes the most complex single logic element in a micro- processor.
It is responsible for performing arithmetic and logical operations as directed by the
instruction decode logic. Not only does the ALU add or subtract data from the
accumulator, it also keeps track of status ?ags that tell subsequent branch
instructions whether the result was positive, negative, or zero, and whether an
addition or subtraction operation created a carry or borrow bit. These status
bits are also updated for logical operations such as AND or OR so that software
can take different action if a logical comparison is true or false.

For ease of presentation, the microprocessor in Fig. 3.4 is shown having a single
general-purpose accumulator register. Most real microprocessors contain more
than one internal register that can be used for general manipulation operations.
Some microprocessors have as few as one or two such registers, and some have
dozens or more than a hundred. It is the concept of an accumulator that is discussed
here, but there is no conceptual limitation on how many accumulators or registers
a microprocessor can have.

A microprocessor needs a mechanism to keep track of its place in the instruction
sequence. Like a bookmark that saves your place as you read through a book,
the program counter (PC) maintains the address of the next instruction to be
fetched from program memory. The PC is a counter that can be reloaded with
a new value from the instruction decoder. Under normal operation, the
microprocessor moves through instructions sequentially. After executing each
instruction, the PC is incremented, and a new instruction is fetched from the
address indicated by the PC. The major exception to this linear behavior is
when branch instructions are encountered. Branch instructions exist speci?cally
to override the sequential execution of instructions. When the instruction decoder
fetches a branch in- struction, it must determine the condition for the branch.
If the condition is met (e.g., the ALU zero ?ag is asserted), the branch target
address is loaded into the PC. Now, when the instruction decoder goes to
fetch the next instruction, the PC will point to a new part of the instruction
sequence instead of simply the next program memory location.

By : E-book Complete_Digital_Design